SilicaProg - Revision history

Grzegorzbecker: /* Description */

2024-11-02T10:11:48Z

Description

← Older revision		Revision as of 10:11, 2 November 2024
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	__jzpdf__		__jzpdf__
	===== Description =====		====== Description ======
	SilicaProg is a universal programmer-configurator for ISP that allows programming of CPLD and FPGA from Xilinx. It cooperates with i.a. the free WebPack toolkit, it is compatible with the standard Xilinx programmer called Parallel Cable III (DLC 5).		SilicaProg is a universal programmer-configurator for ISP that allows programming of CPLD and FPGA from Xilinx. It cooperates with i.a. the free WebPack toolkit, it is compatible with the standard Xilinx programmer called Parallel Cable III (DLC 5).

Anna Kubacka at 09:06, 24 September 2020

2020-09-24T09:06:51Z

← Older revision		Revision as of 09:06, 24 September 2020
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	===== Description =====		===== Description =====
	SilicaProg is a universal programmer-configurator for ISP that allows programming of CPLD and FPGA from Xilinx. It cooperates with i.a. the free WebPack toolkit, it is compatible with the standard Xilinx programmer called Parallel Cable III (DLC 5).		SilicaProg is a universal programmer-configurator for ISP that allows programming of CPLD and FPGA from Xilinx. It cooperates with i.a. the free WebPack toolkit, it is compatible with the standard Xilinx programmer called Parallel Cable III (DLC 5).

	<center>		<center>
	[[File:silica_prg.jpg\|none\|400px\|thumb\|center]]		[[File:silica_prg.jpg\|none\|400px\|thumb\|center]]

Wlodzimierzhepner: /* JTAG connector */

2018-09-14T07:47:53Z

JTAG connector

← Older revision		Revision as of 07:47, 14 September 2018
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	<center>		<center>
	[[File:~~SilicaProg_rys2~~.png\|none\|400px\|thumb\|center]]		[[File:SilicaProg_en_rys2.png\|none\|400px\|thumb\|center]]
	</center>		</center>


	===== Cooperation with PC =====		===== Cooperation with PC =====
	The programmer is connected to the computer's parallel printer interface. It is not recommended to use between the PC connector and programmer additional extension cable. They may prevent the programmer from working correctly.		The programmer is connected to the computer's parallel printer interface. It is not recommended to use between the PC connector and programmer additional extension cable. They may prevent the programmer from working correctly.

Wlodzimierzhepner: /* Placement of components */

2018-09-14T07:47:29Z

Placement of components

← Older revision		Revision as of 07:47, 14 September 2018
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	<center>		<center>
	[[File:~~SilicaProg_rys1~~.png\|none\|400px\|thumb\|center]]		[[File:SilicaProg_en_rys1.png\|none\|400px\|thumb\|center]]
	</center>		</center>


	===== JTAG connector =====		===== JTAG connector =====

Anna Kubacka: Created page with "jzpdf ===== Description ===== SilicaProg is a universal programmer-configurator for ISP that allows programming of CPLD and FPGA from Xilinx. It cooperates with i.a. the f..."

2018-08-27T13:34:36Z

Created page with "__jzpdf__ ===== Description ===== SilicaProg is a universal programmer-configurator for ISP that allows programming of CPLD and FPGA from Xilinx. It cooperates with i.a. the f..."

New page

__jzpdf__
===== Description =====
SilicaProg is a universal programmer-configurator for ISP that allows programming of CPLD and FPGA from Xilinx. It cooperates with i.a. the free WebPack toolkit, it is compatible with the standard Xilinx programmer called Parallel Cable III (DLC 5).

<center>
[[File:silica_prg.jpg|none|400px|thumb|center]]
</center>

<center>
[[File:silica_prg2.jpg|none|400px|thumb|center]]
</center>

===== Basic features and equipment of programmer =====
* compatibile with Parallel Cable III (DLC 5) from Xilinx;
* cooperate with Xilinx toolkit (i.a.. WebPack);
* power supply: 3,3...5,5 V (supplied from the programmed chip);
* programs CPLD systems and configurators of FPGA, configures FPGA – all from Xilinx;
* output iterface: JTAG;
* output connector: IDC10 (signal placement compatible with boards and modules dipPLD from Kamami.pl);
* LED indicates power supply enabling;
* connects to the printer port PC.

===== Standard equipment =====

<center>
{| class="wikitable" style="width: 1000px;"
|-
! style="text-align: center;"|Code
! style="text-align: center;"|Description
|-
| style="text-align: center;"|<b>SilicaProg</b>
| style="text-align: left;"|
* Assembled and launched JTAG interface
* Connection cable with IDC10 connector length 30 cm
|}
</center>

===== Placement of components =====
The placement of the most important programmer elements is shown in the figure below.

<center>
[[File:SilicaProg_rys1.png|none|400px|thumb|center]]
</center>

===== JTAG connector =====
The placement of signals in the JTAG output socket is shown in the figure below. It is compatible with the standard used in all sets with PLD systems produced by Kamami.pl. The length of the connection cable should not exceed 1 m (the cable included with the programmer is 30 cm long).

<center>
[[File:SilicaProg_rys2.png|none|400px|thumb|center]]
</center>

===== Cooperation with PC =====
The programmer is connected to the computer's parallel printer interface. It is not recommended to use between the PC connector and programmer additional extension cable. They may prevent the programmer from working correctly.

SilicaProg - Revision history

Grzegorzbecker: /* Description */

Anna Kubacka at 09:06, 24 September 2020

Wlodzimierzhepner: /* JTAG connector */

Wlodzimierzhepner: /* Placement of components */

Anna Kubacka: Created page with "__jzpdf__ ===== Description ===== SilicaProg is a universal programmer-configurator for ISP that allows programming of CPLD and FPGA from Xilinx. It cooperates with i.a. the f..."

Anna Kubacka: Created page with "jzpdf ===== Description ===== SilicaProg is a universal programmer-configurator for ISP that allows programming of CPLD and FPGA from Xilinx. It cooperates with i.a. the f..."